1. Field of the Invention
The invention relates to superconductive circuits particularly with respect to superconductive tunnel junction devices.
2. Description of the Prior Art
A process for fabricating superconductive tunnel junction circuits is disclosed in a paper by H. Kroger, L. N. Smith and D. W. Jillie, entitled "Selective Niobium Anodization Process for Fabricating Josephson Tunnel Junctions" in the Applied Physics Letters, Volume 39, No. 3, Aug. 1, 1981, page 280. Further details of the process may be found in pending U.S. patent application Ser. No. 179,311, filed Aug. 18, 1980 entitled "Superconductive Tunnel Junction Device and Method of Manufacture", by Harry Kroger and assigned to the assignee of the present invention, now U.S. Pat. No. 4,421,785. The process involves forming a sandwich comprising a lower superconductive layer, a barrier layer and an upper superconductive layer, preferably in situ in the same pump down of the vacuum system. Tunnel junctions are then formed in the sandwich by masking the upper superconductive layer by, for example, photoresistive material or an insulating mask such as silicon dioxide and converting the exposed portions of the upper superconductive layer to insulating material. Alternatively, all or a portion of the barrier layer underlying the exposed areas of the upper superconductive layer may also be converted. The lower superconductive layer remains substantially unconverted to insulation. The conversion to insulation is preferably performed by anodization or alternatively by oxidation.
In the process disclosed in said Applied Physics Letters and in said U.S. Ser. No. 179,311, accurate control of the area of small superconductive junctions (less than or approximately equal to one square micrometer) utilizing standard planar lithographic techniques was difficult to achieve. Additionally, maintaining the accuracy and uniformity of the area of larger junctions (several microns on a side) was difficult to achieve utilizing standard planar lithography. For example, in order to achieve area uniformity of .+-.5% in junctions having lateral dimensions of 2.5 microns, control of the lateral dimensions to within .+-.2.5% or 0.06 microns is required. Such precise dimensional control is very difficult to accomplish with the method of said Applied Physics Letters and said U.S. Ser. No. 179,311 when utilizing standard planar lithography.